Soft errors are an increasing problem. Also, the trend toward increasing the number of processor cores creates a need to add reliability features to reduce the per core failure rate, such as the failure in time (FIT) rate. Due to constraints such as latency and overhead, register files are currently protected only by parity, which is a problem when multiple strikes or multiple errors occur. Moreover, parity can only detect an odd number of errors. When registers store register values with long lives (i.e. the values are stored for long periods without being read), multiple errors may occur undetected. This problem is known as Silent Data Corruption.
One option to avoid Silent Data Corruption is scrubbing the register file. However, scrubbing the register file may have a significant impact on performance. Another option is using stronger error detection and correction codes in register files. However, stronger codes can create significant latency issues and may require greater area on a chip.